8 Bit Serial To Parallel Converter Verilog Code
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I'm a beginner using verilog. I am trying to make a simple parallel to serial converter (8 bits parallel down to 1 bit serial). I have 2 textbooks but I think it is way too complicated for me to understand. Right now when I try to simulate my simple Parallel-to-Serial module the input of 8-bits parallel appear but only 1 of the 8 serial bit appear. Design of Serial IN - Parallel Out Shift Register using Behavior Modeling Style - Output Waveform: Serial IN - Parallel OUT. Sunday, 21 July 2013 Design of Serial IN - Parallel OUT Shift Register using Behavior Modeling Style (Verilog CODE).
Hello I am trying to implement a parallel in serial out shift register based on the data sheet for the 74LV165A 8 bit parallel in serial out shift register the spec sheet may be found at If I make my test bench begin by shifting in serially, then try to latch data on the parallel input the data does not appear. If I begin the test bench in with parallel latch enabled then the data appears on the Q and will clock through once shifting is enabled. My goal is to shift several sets of data through this register however currently this behavior is preventing this. Any help would be very very appreciated, event if its just a hint:) Currently I am monitoring the set and reset information and the Q lines.
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There is no pin for synchronization. The RS-232 serial protocol has a start and stop bit, logic 0 and 1 respectively. An idle channel will have a logic 1. So if the channel goes from idle to active, 0 will be the first thing you see. If you pick up the channel in the middle of transmission you'll end up having to find the pattern of 10 repeating every 10 bits (8-bit data). I actually don't think anyone does that type of synchronization.
From observation of devices that used RS-232 to receive data, I always remember seeing garbage if you hooked it up in the middle of a burst of data. I think most devices need a pause before achieving synchornization.